Programmable photonic chip design enables tunable light delays for optical computing

Researchers at Seoul National University and the University of Seoul have developed a theoretical architecture for a programmable photonic integrated circuit that can dynamically control how long light pulses take to travel through a chip. The design builds on coupled-resonator-induced transparency (CRIT), a technique that uses interacting optical resonators to create a narrow transmission window where light experiences a substantial delay. Unlike conventional CRIT devices, whose delay and frequency response are fixed during manufacturing, the new architecture introduces two tunable loop couplers that allow the same circuit to be reconfigured after it is built.

In the proposed system, the bright and dark modes of the resonator network are treated as a unified controllable system. Adjusting the tunable couplers changes how the resonators interact, enabling control over the width and shape of the transmission band, the transmission efficiency, and the delay experienced by optical pulses. Numerical simulations indicated that the delay can be altered dynamically while the circuit is operating, and that the architecture can also manipulate the frequency of transmitted light, potentially replacing separate frequency-conversion components.

To assess manufacturability, the team modeled the design on a silicon-nitride photonic integrated circuit platform and performed three-dimensional electromagnetic simulations that incorporated realistic imperfections. These included material losses, resonator-to-resonator variations, unwanted backscattering, coupling variations, phase errors, and thermal crosstalk between neighboring components. The researchers report that the architecture remained functional despite these non-ideal effects, suggesting it should be physically achievable with existing photonic fabrication technology.

The work is currently based on theory, numerical modeling, and detailed electromagnetic simulations alone; no experimental devices have been fabricated or tested. The researchers plan to move toward practical device fabrication and experimental validation, with the goal of expanding the concept into larger programmable photonic circuits. If realized, such circuits could provide synchronization, buffering, and signal-processing functions for future optical computers and high-speed communications systems.

Conventional electronic processors move data as electrical signals through metal interconnects, which consumes increasing amounts of power and creates bandwidth bottlenecks as systems scale. Photonics offers a path to move data with light, generating far less resistive heating, but computing requires signals to arrive on cue rather than simply as fast as possible. The ability to programmably delay, sync, buffer, and filter optical signals on a single reconfigurable chip addresses a key obstacle to practical optical computing.

Prof. Namkyoo Park of Seoul National University stated that the research proposes a new design principle allowing the flow of light within photonic integrated circuits to be reconfigured as needed, greatly enhancing design flexibility. The study was published in the journal Advanced Science.